67 lines
1.4 KiB
Makefile
67 lines
1.4 KiB
Makefile
# Makefile for SLS project with automatic header dependencies
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CC ?= gcc
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CFLAGS ?= -std=c11 -Wall -Wextra -g -Iinclude -MMD -MP
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LDFLAGS ?=
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SRCDIR := src
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OBJDIR := obj
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BINDIR := bin
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TESTDIR := tests
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TARGET := $(BINDIR)/sls
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TEST_TARGET := $(BINDIR)/sls_tests
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SOURCES := $(wildcard $(SRCDIR)/*.c)
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OBJECTS := $(patsubst $(SRCDIR)/%.c,$(OBJDIR)/%.o,$(SOURCES))
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TEST_SOURCES := $(wildcard $(TESTDIR)/*.c)
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TEST_OBJECTS := $(patsubst $(TESTDIR)/%.c,$(OBJDIR)/%.o,$(TEST_SOURCES))
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# Include dependency files if they exist
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-include $(OBJECTS:.o=.d) $(TEST_OBJECTS:.o=.d)
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.PHONY: all build run test clean
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# Default: build main program
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all: $(TARGET)
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# Compile object files
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build: $(OBJECTS)
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# Rule to compile .c -> .o (handles both src and tests)
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$(OBJDIR)/%.o: $(SRCDIR)/%.c | $(OBJDIR)
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$(CC) $(CFLAGS) -c $< -o $@
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$(OBJDIR)/%.o: $(TESTDIR)/%.c | $(OBJDIR)
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$(CC) $(CFLAGS) -c $< -o $@
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# Link main program
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$(TARGET): $(OBJECTS) | $(BINDIR)
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$(CC) $(LDFLAGS) $^ -o $@
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# Run main program
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run: $(TARGET)
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@echo "Running $(TARGET)..."
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./$(TARGET)
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# Build test runner executable
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$(TEST_TARGET): $(TEST_OBJECTS) $(OBJECTS) | $(BINDIR)
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$(CC) $(LDFLAGS) $^ -o $@
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# Run tests
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test: $(TEST_TARGET)
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@echo "Running tests..."
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./$(TEST_TARGET)
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# Create directories if missing
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$(BINDIR):
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mkdir -p $(BINDIR)
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$(OBJDIR):
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mkdir -p $(OBJDIR)
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# Remove build artifacts
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clean:
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rm -rf $(OBJDIR) $(BINDIR)
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