Updated emulator and assembler to updated ISA
This commit is contained in:
Kyler
parent
4ebf74a04d
commit
26ae9ab526
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@ -5,7 +5,7 @@ from typing import BinaryIO
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ROM_SIZE = 0x700
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MAX_INT = 0x1000
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MAX_IMMEDIATE = 0x80
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MAX_IMMEDIATE = 0x40
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class ConfigurationError(Exception): pass
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@ -126,11 +126,9 @@ class Computer:
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_running: bool
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_halted: bool
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_interrupt_flag: list[int]
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_pc_last: int
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_zero_flag: bool
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_interruptable: bool
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_negative_flag: bool
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_pc: int
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_sp: int
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@ -145,11 +143,10 @@ class Computer:
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self._running = True
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self._halted = False
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self._interrupt_flag = []
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self._pc_last = 0
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self._zero_flag = False
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self._interruptable = False
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self._negative_flag = False
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self._pc = 0
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self._sp = 0
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@ -244,8 +241,10 @@ class Computer:
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elif index == 6: self._d2 = value
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elif index == 7: self._d3 = value
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def interrupt(self, index: int):
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self._interrupt_flag.append(index % MAX_INT)
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def _update_flags(self, value: int):
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value %= MAX_INT
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self._zero_flag = value == 0
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self._negative_flag = (value & 0x800) == 1
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def step(self, verbose: bool = False):
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instruction = self._mem[self.program_counter]
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@ -258,17 +257,17 @@ class Computer:
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if instruction == 0: self.NOP()
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elif instruction == 1: self.HLT()
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elif instruction == 2: self.INT()
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elif instruction == 3: self.BNZ()
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elif instruction == 4: self.BLK()
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elif instruction == 5: self.ENB()
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elif instruction & 0xFF8 == 0x10: self.GLA(instruction & 0x7)
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elif instruction & 0xFF8 == 0x18: self.GET(instruction & 0x7)
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elif instruction == 2: self.BNZ()
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elif instruction == 3: self.BNA()
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elif instruction == 4: self.BNP()
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elif instruction == 5: self.BNN()
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elif instruction & 0xFF8 == 0x20: self.LOD(instruction & 0x7)
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elif instruction & 0xFF8 == 0x28: self.STR(instruction & 0x7)
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elif instruction & 0xFF8 == 0x30: self.PSH(instruction & 0x7)
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elif instruction & 0xFF8 == 0x38: self.POP(instruction & 0x7)
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elif instruction & 0xF80 == 0x80: self.LDI(instruction & 0x7F)
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elif instruction & 0xFF8 == 0x30: self.POP(instruction & 0x7)
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elif instruction & 0xFF8 == 0x38: self.PSH(instruction & 0x7)
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elif instruction & 0xFC0 == 0x40: self.LIU(instruction & 0x3F)
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elif instruction & 0xFC0 == 0x80: self.LDI(instruction & 0x3F)
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elif instruction & 0xFC0 == 0xC0: self.LIL(instruction & 0x3F)
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elif instruction & 0xFC0 == 0x100:
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self.LSH((instruction & 0x38) >> 3, instruction & 0x7)
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elif instruction & 0xFC0 == 0x140:
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@ -290,29 +289,29 @@ class Computer:
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(instruction & 0x1C0) >> 6,
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)
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elif instruction & 0xE00 == 0x600:
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self.NAD(
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instruction & 0x7,
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(instruction & 0x38) >> 3,
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(instruction & 0x1C0) >> 6,
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)
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elif instruction & 0xE00 == 0x800:
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self.SUB(
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instruction & 0x7,
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(instruction & 0x38) >> 3,
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(instruction & 0x1C0) >> 6,
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)
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elif instruction & 0xE00 == 0xA00:
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elif instruction & 0xE00 == 0x800:
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self.XOR(
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instruction & 0x7,
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(instruction & 0x38) >> 3,
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(instruction & 0x1C0) >> 6,
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)
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elif instruction & 0xE00 == 0xC00:
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elif instruction & 0xE00 == 0xA00:
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self.NOR(
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instruction & 0x7,
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(instruction & 0x38) >> 3,
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(instruction & 0x1C0) >> 6,
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)
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elif instruction & 0xE00 == 0xC00:
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self.NAD(
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instruction & 0x7,
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(instruction & 0x38) >> 3,
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(instruction & 0x1C0) >> 6,
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)
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elif instruction & 0xE00 == 0xE00:
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self.ADD(
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instruction & 0x7,
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@ -330,17 +329,19 @@ class Computer:
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if instruction == 0: print("NOP")
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elif instruction == 1: print("HLT")
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elif instruction == 2: print("INT")
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elif instruction == 3: print("BNZ")
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elif instruction == 4: print("BLK")
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elif instruction == 5: print("ENB")
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elif instruction == 2: print("BNZ")
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elif instruction == 3: print("BNA")
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elif instruction == 4: print("BNP")
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elif instruction == 5: print("BNN")
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elif instruction & 0xFF8 == 0x10: print(f"GLA {instruction & 0x7}")
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elif instruction & 0xFF8 == 0x18: print(f"GET {instruction & 0x7}")
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elif instruction & 0xFF8 == 0x20: print(f"LOD {instruction & 0x7}")
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elif instruction & 0xFF8 == 0x28: print(f"STR {instruction & 0x7}")
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elif instruction & 0xFF8 == 0x30: print(f"PSH {instruction & 0x7}")
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elif instruction & 0xFF8 == 0x38: print(f"POP {instruction & 0x7}")
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elif instruction & 0xF80 == 0x80: print(f"LDI {instruction & 0x7F}")
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elif instruction & 0xFF8 == 0x30: print(f"POP {instruction & 0x7}")
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elif instruction & 0xFF8 == 0x38: print(f"PSH {instruction & 0x7}")
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elif instruction & 0xFC0 == 0x40: print(f"LIU {instruction & 0x3F}")
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elif instruction & 0xFC0 == 0x80: print(f"LDI {instruction & 0x3F}")
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elif instruction & 0xFC0 == 0xC0: print(f"LIL {instruction & 0x3F}")
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elif instruction & 0xFC0 == 0x100:
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print(f"LSH {instruction & 0x7} {(instruction & 0x38) >> 3}")
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elif instruction & 0xFC0 == 0x140:
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@ -361,22 +362,22 @@ class Computer:
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)
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elif instruction & 0xE00 == 0x600:
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print(
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f"NAD {instruction & 0x7} {(instruction & 0x1C0) >> 6} "
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f"SUB {instruction & 0x7} {(instruction & 0x1C0) >> 6} "
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f"{(instruction & 0x38) >> 3}"
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)
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elif instruction & 0xE00 == 0x800:
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print(
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f"SUB {instruction & 0x7} {(instruction & 0x1C0) >> 6} "
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f"XOR {instruction & 0x7} {(instruction & 0x1C0) >> 6} "
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f"{(instruction & 0x38) >> 3}"
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)
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elif instruction & 0xE00 == 0xA00:
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print(
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f"XOR {instruction & 0x7} {(instruction & 0x1C0) >> 6} "
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f"NOR {instruction & 0x7} {(instruction & 0x1C0) >> 6} "
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f"{(instruction & 0x38) >> 3}"
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)
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elif instruction & 0xE00 == 0xC00:
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print(
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f"NOR {instruction & 0x7} {(instruction & 0x1C0) >> 6} "
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f"NAD {instruction & 0x7} {(instruction & 0x1C0) >> 6} "
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f"{(instruction & 0x38) >> 3}"
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)
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elif instruction & 0xE00 == 0xE00:
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@ -399,30 +400,24 @@ class Computer:
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self._halted = True
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self.program_counter += 1
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def INT(self):
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self.interrupt(self.pointer)
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self.program_counter += 1
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def BNZ(self):
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if self.zero_flag:
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self.program_counter = self.pointer
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self.program_counter += 1
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def BLK(self):
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self._interruptable = False
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def BNA(self):
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if not self.zero_flag:
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self.program_counter = self.pointer
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self.program_counter += 1
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def ENB(self):
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self._interruptable = True
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def BNP(self):
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if not self._negative_flag:
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self.program_counter = self.pointer
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self.program_counter += 1
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def GLA(self, REG: int):
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self.set_reg(REG, self._pc_last)
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self.program_counter += 1
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def GET(self, REG: int):
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if self._interrupt_flag: self.set_reg(REG, self._interrupt_flag.pop())
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else: self.set_reg(REG, 0)
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def BNN(self):
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if self._negative_flag:
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self.program_counter = self.pointer
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self.program_counter += 1
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def LOD(self, REG: int):
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@ -433,92 +428,100 @@ class Computer:
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self._mem[self.pointer] = self.get_reg(REG)
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self.program_counter += 1
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def POP(self, REG: int):
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self._mem[self.stack_pointer] = self.get_reg(REG)
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self.program_counter += 1
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def PSH(self, REG: int):
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self.set_reg(REG, self._mem[self.stack_pointer])
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self.program_counter += 1
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def POP(self, REG: int):
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self._mem[self.stack_pointer] = self.get_reg(REG)
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def LIU(self, Immediate: int):
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self.pointer = (Immediate % MAX_IMMEDIATE) << 6
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self.program_counter += 1
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def LDI(self, Immediate: int):
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self.pointer = Immediate % MAX_IMMEDIATE
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self.program_counter += 1
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def LIL(self, Immediate: int):
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self.pointer |= (Immediate % MAX_IMMEDIATE)
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self.program_counter += 1
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def LSH(self, REG_D: int, REG_A: int):
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result = self.get_reg(REG_A) << 1
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result %= MAX_INT
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self._zero_flag = result == 0
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def RSH(self, REG_D: int, REG_A: int):
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result = self.get_reg(REG_A) >> 1
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result %= MAX_INT
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self._zero_flag = result == 0
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def INC(self, REG_D: int, REG_A: int):
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result = self.get_reg(REG_A) + 1
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result %= MAX_INT
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self._zero_flag = result == 0
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def DEC(self, REG_D: int, REG_A: int):
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result = self.get_reg(REG_A) - 1
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result %= MAX_INT
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self._zero_flag = result == 0
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def AND(self, REG_D: int, REG_A: int, REG_B: int):
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result = self.get_reg(REG_A) & self.get_reg(REG_B)
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result %= MAX_INT
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self._zero_flag = result == 0
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def OR(self, REG_D: int, REG_A: int, REG_B: int):
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result = self.get_reg(REG_A) | self.get_reg(REG_B)
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result %= MAX_INT
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self._zero_flag = result == 0
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def NAD(self, REG_D: int, REG_A: int, REG_B: int):
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result = (MAX_INT - 1) ^ (self.get_reg(REG_A) & self.get_reg(REG_B))
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result %= MAX_INT
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self._zero_flag = result == 0
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def SUB(self, REG_D: int, REG_A: int, REG_B: int):
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result = self.get_reg(REG_A) + ((MAX_INT - 1) ^ self.get_reg(REG_B)) + 1
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result %= MAX_INT
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self._zero_flag = result == 0
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def XOR(self, REG_D: int, REG_A: int, REG_B: int):
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result = self.get_reg(REG_A) ^ self.get_reg(REG_B)
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result %= MAX_INT
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self._zero_flag = result == 0
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def NOR(self, REG_D: int, REG_A: int, REG_B: int):
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result = (MAX_INT - 1) ^ (self.get_reg(REG_A) | self.get_reg(REG_B))
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result %= MAX_INT
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self._zero_flag = result == 0
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def NAD(self, REG_D: int, REG_A: int, REG_B: int):
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result = (MAX_INT - 1) ^ (self.get_reg(REG_A) & self.get_reg(REG_B))
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result %= MAX_INT
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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def ADD(self, REG_D: int, REG_A: int, REG_B: int):
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result = self.get_reg(REG_A) + self.get_reg(REG_B)
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result %= MAX_INT
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self._zero_flag = result == 0
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self._update_flags(result)
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self.set_reg(REG_D, result)
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self.program_counter += 1
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@ -5,7 +5,7 @@ from collections import namedtuple
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from typing import TypeVar, Generic, Iterable, Sequence
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INSTRUCTIONS_COUNT = 0x700
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MAX_IMMEDIATE = 0x80
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MAX_IMMEDIATE = 0x40
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class AssemblerError(Exception): pass
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class LinkerError(Exception): pass
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@ -175,19 +175,21 @@ class Program:
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instruction_set = {
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"NOP": lambda *_: Instruction(0, 0, 0, 0),
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"HLT": lambda *_: Instruction(0, 0, 0, 1),
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"INT": lambda *_: Instruction(0, 0, 0, 2),
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"BNZ": lambda *_: Instruction(0, 0, 0, 3),
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"BLK": lambda *_: Instruction(0, 0, 0, 4),
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"ENB": lambda *_: Instruction(0, 0, 0, 5),
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"BNZ": lambda *_: Instruction(0, 0, 0, 2),
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"BNA": lambda *_: Instruction(0, 0, 0, 3),
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"BNP": lambda *_: Instruction(0, 0, 0, 4),
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"BNN": lambda *_: Instruction(0, 0, 0, 5),
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"GLA": lambda l, i: Instruction(0, 0, 2, reg1(l, i)),
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"GET": lambda l, i: Instruction(0, 0, 3, reg1(l, i)),
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"LOD": lambda l, i: Instruction(0, 0, 4, reg1(l, i)),
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"STR": lambda l, i: Instruction(0, 0, 5, reg1(l, i)),
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"PSH": lambda l, i: Instruction(0, 0, 6, reg1(l, i)),
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"POP": lambda l, i: Instruction(0, 0, 7, reg1(l, i)),
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"POP": lambda l, i: Instruction(0, 0, 6, reg1(l, i)),
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"PSH": lambda l, i: Instruction(0, 0, 7, reg1(l, i)),
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"LIU": lambda l, i: Instruction(0, 1, *immediate_value(l, i)),
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"LDI": lambda l, i: immediate(l, i),
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"LIL": lambda l, i: Instruction(0, 3, *immediate_value(l, i)),
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"LSH": lambda l, i: Instruction(0, 4, *reg2(l, i)),
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"RSH": lambda l, i: Instruction(0, 5, *reg2(l, i)),
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@ -196,10 +198,10 @@ class Program:
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"AND": lambda l, i: Instruction(1, *reg3(l, i)),
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"OR": lambda l, i: Instruction(2, *reg3(l, i)),
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"NAD": lambda l, i: Instruction(3, *reg3(l, i)),
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"SUB": lambda l, i: Instruction(4, *reg3(l, i)),
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"XOR": lambda l, i: Instruction(5, *reg3(l, i)),
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"NOR": lambda l, i: Instruction(6, *reg3(l, i)),
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"SUB": lambda l, i: Instruction(3, *reg3(l, i)),
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"XOR": lambda l, i: Instruction(4, *reg3(l, i)),
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"NOR": lambda l, i: Instruction(5, *reg3(l, i)),
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"NAD": lambda l, i: Instruction(6, *reg3(l, i)),
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"ADD": lambda l, i: Instruction(7, *reg3(l, i)),
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}
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@ -385,6 +387,18 @@ def reg3(line: str, line_number: int) -> tuple[int, int, int]:
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raise AssemblerError(
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f"Invalid number of arguments on line {line_number}: {args[0]}")
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def immediate_value(line: str, line_number: int) -> tuple[int, int]:
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args = line.split(' ')
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if len(args) == 2:
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value = int(args[1], base=0)
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if value >= MAX_IMMEDIATE:
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raise AssemblerError(
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f"Immediate value too large {line_number}: {args[1]}")
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return ((value & 0x038) >> 3, value & 0x007)
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else:
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raise AssemblerError(
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f"Invalid number of arguments on line {line_number}: {args[0]}")
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def immediate(line: str, line_number: int) -> Instruction | Immediate:
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args = line.split(' ')
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if len(args) == 2:
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@ -4,16 +4,6 @@
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; .0x5
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main:
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; Load Output Device Address
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ldi 0x7F
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or D3 MP ZR
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lsh D3 D3
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lsh D3 D3
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lsh D3 D3
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lsh D3 D3
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ldi 0xE
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or D3 MP D3
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|
||||
; Initialize Fibonacci values
|
||||
ldi 1
|
||||
or D0 MP ZR
|
||||
|
|
@ -22,7 +12,8 @@ main:
|
|||
|
||||
loop:
|
||||
; Output current value
|
||||
or MP D3 ZR
|
||||
liu 0x1f
|
||||
lil 0x3E
|
||||
str D0
|
||||
|
||||
; Move values down
|
||||
|
|
|
|||
Loading…
Reference in New Issue