From 5ec5d44736f77a48e3b493cc286f1b1dc99df60a Mon Sep 17 00:00:00 2001 From: Kyler <59854022+KylerOlsen@users.noreply.github.com> Date: Fri, 5 Jul 2024 20:26:20 -0600 Subject: [PATCH] Directed readers to docs/12-bit ISA.html instead of docs/12-bit ISA.ods --- README.md | 2 +- docs/12-bit ISA.html | 1766 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 1767 insertions(+), 1 deletion(-) create mode 100644 docs/12-bit ISA.html diff --git a/README.md b/README.md index 1589195..3f615ce 100644 --- a/README.md +++ b/README.md @@ -11,7 +11,7 @@ The purpose of this project is for me to practice creating an ISA and a compiler ## ISA -*See file `docs/12-bit ISA.ods`* +*See file `docs/12-bit ISA.html`* ## Assembly Language diff --git a/docs/12-bit ISA.html b/docs/12-bit ISA.html new file mode 100644 index 0000000..581b8ec --- /dev/null +++ b/docs/12-bit ISA.html @@ -0,0 +1,1766 @@ + + + + + + Document + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ Instructions +
+ Mnemonic + + Full name + + Bits + + Notes +
+ NOP + + No Operation + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ No Operation +
+ HLT + + Halt + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Halt +
+ BNZ + + Branch if Zero + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Move from Pointer to PC if Zero Flag is set +
+ BNA + + Branch if Not Zero + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Move from Pointer to PC if Zero Flag is not set +
+ BNP + + Branch if Positive + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Move from Pointer to PC if Negative Flag is not set +
+ BNN + + Branch if Negative + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Move from Pointer to PC if Negative Flag is set +
+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Unused +
+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Unused +
+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Unused +
+ LOD + + Load from Memory + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ RegD + + Load from Memory pointed by Pointer +
+ STR + + Store in Memory + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ RegA + + Store in Memory pointed by Pointer +
+ POP + + Load from Stack + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ RegD + + Load from Stack +
+ PSH + + Store in Stack + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ RegA + + Store in Stack +
+ LIU + + Load Immediate Upper + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Immediate + + Load Immediate Value * 64 into Pointer +
+ LDI + + Load Immediate + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Immediate + + Load Immediate Value into Pointer +
+ LIL + + Load Immediate Lower + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ Immediate + + OR Immediate Value with Pointer and store into Pointer +
+ LSH + + Left Shift + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ RegA + + RegD + + Left Shift +
+ RSH + + Right Shift + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ RegA + + RegD + + Right Shift +
+ INC + + Increment + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ RegA + + RegD + + Increment +
+ DEC + + Decrement + +
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ RegA + + RegD + + Decrement +
+ AND + + Bitwise AND + +
+ 		+
+ 		+
+ 		+ RegB + + RegA + + RegD + + Bitwise AND +
+ OR + + Bitwise OR + +
+ 		+
+ 		+
+ 		+ RegB + + RegA + + RegD + + Bitwise OR +
+ SUB + + Subtract + +
+ 		+
+ 		+
+ 		+ RegB + + RegA + + RegD + + Bitwise NOT B then Add plus carry-in +
+ XOR + + Bitwise XOR + +
+ 		+
+ 		+
+ 		+ RegB + + RegA + + RegD + + Bitwise XOR +
+ NAD + + Bitwise NAND + +
+ 		+
+ 		+
+ 		+ RegB + + RegA + + RegD + + Bitwise NAND +
+ NOR + + Bitwise NOR + +
+ 		+
+ 		+
+ 		+ RegB + + RegA + + RegD + + Bitwise NOR +
+ ADD + + Add + +
+ 		+
+ 		+
+ 		+ RegB + + RegA + + RegD + + Add +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ Registers +
+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+ R + + W +
+ 0 + +
+ 		+
+ 		+
+ 		+ ZR + + Zero + +
+ 		+
+
+ 1 + +
+ 		+
+ 		+
+ 		+ PC + + Program Counter + +
+ 		+
+
+ 2 + +
+ 		+
+ 		+
+ 		+ SP + + Stack Pointer + +
+ 		+
+
+ 3 + +
+ 		+
+ 		+
+ 		+ ST + + Pointer + +
+ 		+
+
+ 4 + +
+ 		+
+ 		+
+ 		+ D0 + + Data + +
+ 		+
+
+ 5 + +
+ 		+
+ 		+
+ 		+ D1 + +
+ 		+
+
+ 6 + +
+ 		+
+ 		+
+ 		+ D2 + +
+ 		+
+
+ 7 + +
+ 		+
+ 		+
+ 		+ D3 + +
+ 		+
+
+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+
+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+ 		+
+
+ Special Registers + +
+ 		+
+
+ Program Counter Last + +
+ 		+
+
+ Zero Flag + +
+ 		+
+
+ + \ No newline at end of file