Expanded assembly examples

This commit is contained in:
Kyler 2024-03-19 00:16:57 -06:00
parent cb02a237dd
commit 85eba1639b
5 changed files with 197 additions and 8 deletions

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@ -601,6 +601,60 @@ The machine `tty` includes a tty IO device.
- Reading from address `0x7FF` inputs an ASCII/UTF-8 character.
### Assembly Example
Included in the repo is an `examples` directory. Inside there is the
file `test1.s`. It contains a simple assembly program to calculate and output
the fibonacci sequence.
```
; Kyler Olsen - Feb 2024
; Example 1 - ytd 12-bit Computer
; Fibonacci
; .0x5
main:
; Initialize Fibonacci values
ldi 1
or D0 MP ZR
or D1 ZR ZR
or D2 ZR ZR
loop:
; Output current value
liu 0x1f
lil 0x3D
str D0
; Move values down
or D2 D1 ZR
or D1 D0 ZR
; Add last two values to get the next value
add D0 D1 D2
ldi :loop
or PC MP ZR
```
We can assemble and link it using the following command. **Notice: Python 3.12
or higher is required for `pytd12dk`.**
```
python3 -m pytd12dk am examples/test1.s -o bin/a.out
```
We can then execute the binary using the included emulator. We should see the
fibonacci sequence printed to the console. We can use `ctrl` + `c` to exit the
emulator.
```
python3 -m pytd12dk em bin/a.out
```
Also inside the `examples` directory there is a Hello World program in the
file `test2.s`.
## ytd12nc
`ytd12nc` (ytd 12-bit native compiler) is a compiler and assembler with linker

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@ -1,4 +1,4 @@
; Yeahbut - Feb 2024
; Kyler Olsen - Feb 2024
; Example 1 - ytd 12-bit Computer
; Fibonacci

135
examples/test2.s Normal file
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@ -0,0 +1,135 @@
; Kyler Olsen - Mar 2024
; Example 2 - ytd 12-bit Computer
; Hello World
ldi :main
or PC MP ZR
print:
dec SP SP
; Output current value
liu 0x1F
lil 0x3F
str D0
; Return
inc SP SP
pop MP
inc PC MP
main:
; Initialize Stack Pointer
liu 0x3F
lil 0x3F
or SP MP ZR
; 'H' (0x48)
liu 0x1
lil 0x08
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; 'e' (0x65)
liu 0x1
lil 0x25
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; 'l' (0x6c)
liu 0x1
lil 0x2c
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; 'l' (0x6c)
liu 0x1
lil 0x2c
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; 'o' (0x6f)
liu 0x1
lil 0x2f
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; ',' (0x2c)
ldi 0x2c
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; ' ' (0x20)
ldi 0x20
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; 'W' (0x57)
liu 0x1
lil 0x17
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; 'o' (0x6f)
liu 0x1
lil 0x2f
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; 'r' (0x72)
liu 0x1
lil 0x32
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; 'l' (0x6c)
liu 0x1
lil 0x2c
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; 'd' (0x64)
liu 0x1
lil 0x24
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; '!' (0x21)
ldi 0x21
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
; '\n' (0xa)
ldi 0xa
or D0 MP ZR
ldi :print
psh PC
or PC MP ZR
hlt

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@ -40,4 +40,4 @@ class tty(Device):
elif index & 0xf == 0xe:
print(value)
elif index & 0xf == 0xf:
print(chr(value), end='')
print(chr(value & 0x7f), end='')

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@ -269,13 +269,13 @@ class Computer:
elif instruction & 0xFC0 == 0x80: self.LDI(instruction & 0x3F)
elif instruction & 0xFC0 == 0xC0: self.LIL(instruction & 0x3F)
elif instruction & 0xFC0 == 0x100:
self.LSH((instruction & 0x38) >> 3, instruction & 0x7)
self.LSH(instruction & 0x7, (instruction & 0x38) >> 3)
elif instruction & 0xFC0 == 0x140:
self.RSH((instruction & 0x38) >> 3, instruction & 0x7)
self.RSH(instruction & 0x7, (instruction & 0x38) >> 3)
elif instruction & 0xFC0 == 0x180:
self.INC((instruction & 0x38) >> 3, instruction & 0x7)
self.INC(instruction & 0x7, (instruction & 0x38) >> 3)
elif instruction & 0xFC0 == 0x1C0:
self.DEC((instruction & 0x38) >> 3, instruction & 0x7)
self.DEC(instruction & 0x7, (instruction & 0x38) >> 3)
elif instruction & 0xE00 == 0x200:
self.AND(
instruction & 0x7,
@ -429,11 +429,11 @@ class Computer:
self.program_counter += 1
def POP(self, REG: int):
self._mem[self.stack_pointer] = self.get_reg(REG)
self.set_reg(REG, self._mem[self.stack_pointer])
self.program_counter += 1
def PSH(self, REG: int):
self.set_reg(REG, self._mem[self.stack_pointer])
self._mem[self.stack_pointer] = self.get_reg(REG)
self.program_counter += 1
def LIU(self, Immediate: int):