ytd_12-bit_computer/docs/ytd 12-bit computer.md

1.4 KiB

YTD 12-bit Computer

Yeahbut, aka Kyler Olsen

It is a custom computer and instruction set architecture. It also has its own assembly language with assembler. Custom high level language coming soon!

ISA

WIP

Assembly Language

WIP

Registers

  • ZR
  • PC
  • SP
  • MP
  • D0
  • D1
  • D2
  • D3

Zero Operand Instructions

  • NOP
  • HLT
  • BNZ
  • BNA
  • BNP
  • BNN

One Operand Instructions

  • GLA Destination Register
  • GET Destination Register
  • LOD Destination Register
  • STR Source Register
  • POP Destination Register
  • PSH Source Register
  • LIU Immediate Value
  • LDI Immediate Value
  • LDI :Label
  • LIL Immediate Value

Two Operand Instructions

  • LSH Destination Register Source Register
  • RSH Destination Register Source Register
  • INC Destination Register Source Register
  • DEC Destination Register Source Register

Three Operand Instructions

  • AND Destination Register Source Register A Source Register B
  • OR Destination Register Source Register A Source Register B
  • SUB Destination Register Source Register A Source Register B
  • XOR Destination Register Source Register A Source Register B
  • NOR Destination Register Source Register A Source Register B
  • NAD Destination Register Source Register A Source Register B
  • ADD Destination Register Source Register A Source Register B

High Level Language

WIP