63 lines
1.4 KiB
Markdown
63 lines
1.4 KiB
Markdown
# YTD 12-bit Computer
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*Yeahbut, aka Kyler Olsen*
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It is a custom computer and instruction set architecture. It also has its own
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assembly language with assembler. Custom high level language coming soon!
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## ISA
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*WIP*
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## Assembly Language
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*WIP*
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### Registers
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- `ZR`
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- `PC`
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- `SP`
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- `MP`
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- `D0`
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- `D1`
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- `D2`
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- `D3`
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### Zero Operand Instructions
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- `NOP`
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- `HLT`
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- `INT`
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- `BNZ`
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- `BLK`
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- `ENB`
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### One Operand Instructions
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- `GLA` `Destination Register`
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- `GET` `Destination Register`
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- `LOD` `Destination Register`
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- `STR` `Source Register`
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- `PSH` `Source Register`
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- `POP` `Destination Register`
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- `LDI` `Immediate Value`
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- `LDI` :`Label`
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### Two Operand Instructions
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- `LSH` `Destination Register` `Source Register`
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- `RSH` `Destination Register` `Source Register`
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- `INC` `Destination Register` `Source Register`
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- `DEC` `Destination Register` `Source Register`
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### Three Operand Instructions
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- `AND` `Destination Register` `Source Register A` `Source Register B`
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- `OR` `Destination Register` `Source Register A` `Source Register B`
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- `NAD` `Destination Register` `Source Register A` `Source Register B`
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- `SUB` `Destination Register` `Source Register A` `Source Register B`
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- `XOR` `Destination Register` `Source Register A` `Source Register B`
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- `NOR` `Destination Register` `Source Register A` `Source Register B`
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- `ADD` `Destination Register` `Source Register A` `Source Register B`
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## High Level Language
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*WIP*
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